This invention relates to relaxed digitization, and more particularly, to relaxed digitization of an output of a nonlinear element as part of a linearization system.
One approach to linearization of a non-linear element, for example, a power amplifier, makes use of digital samples of inputs and outputs of that element. Then, based on those samples, a predistorter is configured according to these samples such that when it is cascaded with the non-linear element it forms a combination that is linear, or at least more so than without the predistorter.
One application of such techniques addresses radio frequency power amplifiers. For example, a baseband digital signal is converted to an analog signal, modulated to a transmission frequency, and passed through a power amplifier. The output of the power amplifier is sensed and demodulated, and then converted to a digital signal. In such an approach, the modulation-amplification-demodulation path is treated as the non-linear element of the system for which the predistorter is configured. Generally, due to the non-linearity of the power amplifier, even if the input baseband signal is bandlimited, for example to 40 MHz, the bandwidth at the transmission frequency is greater than the baseband bandwidth. Not only is such expansion of the transmission band undesirable in practice, for example, due to interference with adjacent radio channels, it also results in a need to sample the output of the power amplifier at a greater bandwidth than the input signal in order to capture information that is useful or necessary in order to accurately characterize the non-linearity, and thereby be able to configure an appropriate predistorter. One approach is to use an Analog-to-Digital Converter (ADC) that samples the demodulated output signal to represent a greater bandwidth than the input. For example, in the case of a 40 MHz input bandwidth, the input baseband signal may be represented as digital (complex) values sampled at a rate 80M samples per second (i.e., 40M complex samples per second) at a sufficient precision (e.g., 12 bits). But it may be desirable or necessary to represent the output signal with a bandwidth of 200 MHz, resulting in a need to sample at a rate of 400M samples per second.
However, sampling a signal at such a high rate has a number of disadvantages, including cost and size of the circuitry required, power consumption, reliability, and/or volume of digital data that must be processed. There is a need to obtain the advantages of such sampling of the output, while avoiding or mitigating one or more of these disadvantages.